(a) Field of the Invention
The present invention relates to a liquid crystal display (LCD). More particularly, the present invention relates to an LCD and a method for driving the same that eliminates a brightness difference between adjacent pixels caused by coupling capacitance between pixel electrodes of an LCD panel and adjacent data lines, through a signal process of data voltage, and that prevents pixel defects caused by shortening one or two pixels.
(b) Description of the Related Art
LCDs are increasingly being used for the display device in televisions, personal computers, projection-type displays, etc. LCDs are significantly lighter in weight and slimmer, and consume far less energy than the previous-generation cathode-ray tube displays.
LCDs apply an electric field to liquid crystal material having anisotropic dielectricity and injected between two substrates, an array substrate and a counter substrate, arranged substantially parallel to one another with a predetermined gap therebetween, and control the amount of light permeating the substrates by controlling an intensity of the electric field to obtain a desired image signal.
Formed on the array substrate are a plurality of gate lines disposed parallel to one another, and a plurality of data lines insulated from and crossing the gate lines. A plurality of pixel electrodes are formed corresponding to respective regions (hereinafter referred to as “pixel”) defined by the data lines and gate lines. Further, a thin film transistor (TFT) is provided near each of the intersections of the gate lines and the data lines. Each pixel electrode is connected to a data line via a corresponding TFT, the TFT serving as a switching device therebetween.
Each TFT has a gate electrode, drain electrode, and a source electrode. The gate electrode is connected to one of gate lines, and the source electrode is connected to one of data lines and the drain electrode is connected to one of pixel electrodes. Common electrodes are disposed on either the array substrate or the counter substrate.
The operation of the LCD panel structured as in the above will be described hereinafter.
First, after gate ON voltage is applied to the gate electrodes connected to one of the gate lines to turn on the TFTs, data voltage representing image signals is applied to the source electrodes via the data lines such that the data voltage is applied to the pixel electrodes through TFT channels, and an electric field is created by a potential difference between the pixel electrodes and the common electrodes. The electric field intensity is controlled by a level of the data voltage, and the amount of light permeating the substrates is determined by the electric field intensity.
In the above, as the liquid crystal material degrades if the electric field is applied to the liquid crystal material continuously in the same direction, the direction in which the electric field is applied must be constantly changed. Namely, pixel electrode voltage (data voltage) alternates between positive and negative values against the common electrode voltage.
Such a switching of electrode voltage values between positive and negative values is referred to as an inversion driving method. Among the different types of inversion driving methods are frame inversion, line inversion, dot inversion, and column inversion.
In frame inversion, a polarity of pixel electrode voltage for the common electrode voltage changes per frame. However, converting pixel electrode voltage polarity per frame may cause aresidual image or a flicker. In line inversion, the polarity of pixel electrode voltage against the common electrode voltage changes per each horizontal cycle. However, in the line inversion method, the coupling capacitance between the data lines and common electrodes, and the coupling capacitance between the pixel electrodes and common electrodes cause a voltage fluctuation, which results in a crosstalk.
Because of these drawbacks, the dot inversion mode and the column inversion mode are now more commonly used in LCDs.
FIGS. 1a and 1b respectively show the prior art dot inversion driving method and the prior art column inversion driving method. In the drawings, (+) indicates positive pixel voltage against the common voltage, while (−) indicates negative pixel voltage against the common voltage.
As shown in FIG. 1a, polarities of any two adjacent pixels are different in the dot inversion driving method, while in the column inversion driving method, as shown in FIG. 1b, pixels having like polarities are arranged in the same column, with the polarities of the columns alternating from positive to negative.
In the above dot and column inversion drive methods, when the pixels in each row refresh, the number of pixels applied to data voltage having a positive polarity is the same as the number of pixels applied to data voltage having a negative polarity. Accordingly, the coupling capacitance between the data lines and common electrodes and the coupling capacitance between the pixel electrodes and common electrodes may not cause voltage fluctuations.
However, while the above-described dot and column inversion driving methods may appear to work well in theory, in reality there are misalignment and variations in the widths of electrodes and data lines. As a result, coupling capacitances between the pixel electrodes and adjacent data lines are not necessasrily similar.
FIG. 2 shows a view illustrating misalignment between pixel electrodes and data lines in the prior art inversion driving methods shown in FIGS. 1a and 1b. Such misalignment and differences in widths generally occur when the substrates are separated and divided into a plurality of spheres for the patterning process.
In the drawing, Pa and Pb are pixel electrodes, disposed adjacent to but separated from one another, and Vp-a and Vp-b are voltage signals for the pixel electrodes Pa and Pb, respectively. Here, voltage signal Vp-a applies negative voltage against common electrode voltage, while voltage signal Vp-b applies positive voltage.
Although it is designed for the pixel electrodes Pa and Pb to have identical distances from data lines D1, D2, and D3, this is not the case with the actual resulting pattern as the distances between the data lines D1, D2, and D3 and the pixel electrodes Pa and Pb become dissimilar from misalignment and differences in widths of these elements. Because of this variation in distances, coupling capacitance values between the pixel electrodes Pa and Pb, and the data lines D1, D2, D3, and D4 differ.
For example, if the pixel electrode Pa is disposed slightly to the left (in the drawing), while the pixel electrode Pb is disposed slightly to the right (in the drawing), the following results in their coupling capacitance values: Ca-d1>Ca-d2 and Cb-d2<Cb-db3. Here, Ca-d1 and Ca-d2 are the coupling capacitances between the pixel electrode Pa and the data lines D1 and D2, respectively, and Cb-d2 and Cb-d3 are the coupling capacitances between the pixel electrode Pb and the data lines D2 and D3, respectively.
FIG. 3 shows an equivalent circuit diagram for demonstrating influence given to the pixel electrode Pa by voltage fluctuations Vd1 and Vd2 of the data lines D1 and D2, respectively, and the coupling capacitances Ca-d1 and Ca-d2. In the drawing, Vp indicates voltage of the pixel electrode Pa, and Cl indicates liquid crystal capacitance. Here, common electrode voltage is indicated by the grounded level in the drawing as it is a constant value, and storage capacitance is not considered to simplify the circuit analysis. The following formula is established for such a circuit using the law of conservation of charge:                                                         (                                                V                  d1                                -                                  V                  p                                            )                        *                          C                              a                -                d1                                              +                                    (                                                V                  d2                                -                                  V                  p                                            )                        *                          C                              a                -                d2                                                    =                              C            l                    *                      V            p                                                            Accordingly          ,                                    V              p                        =                                                                                V                    d1                                    *                                      C                                          a                      -                      d1                                                                      +                                                      V                    d2                                    *                                      C                                          a                      -                      d2                                                                                                                    C                                      a                    -                    d1                                                  +                                  C                                      a                    -                    d2                                                  +                                  C                  l                                                                    ⁢                                       
As liquid crystal capacitance is generally much larger than coupling capacitance, the above formula is simplified to an approximate formula as in the following:       V    p    =                              V          d1                *                  C                      a            -            d1                              +                        V          d2                *                  C                      a            -            d2                                      C      1      
As can be seen with the above formula, Vp is influenced more by the data voltage with the larger coupling capacitance.
FIG. 4 shows a view illustrating fluctuations in voltage with respect to time when dot or column inversion drive is performed on the pattern shown in FIG. 2.
Since Ca-d1>Ca-d2 as described above, more influence is given by Vd1 than Vd2, and, accordingly, Vp-a is pulled toward a voltage side of Vd1. Further, as Cb-d2<Cb-d3, more influence is given by Vd3 than Vd2 such that Vp-b is pulled toward a voltage side of Vd3.
Namely, in FIG. 4, although an original value of Vp-a should be uniformly smaller than the common voltage as can be seen by the dotted line in the drawing, it is in actual application pulled toward Vd1 by the coupling capacitance. In the same way, although an original value of Vp-b should be uniformly larger than the common voltage, it is pulled toward Vd3.
Accordingly, a root mean square (RMS) of Vp-a becomes smaller than an original value, while a RMS of Vp-b becomes greater than an original value such that the brightness of the two pixels changes.
Further, as shown in FIG. 5a, according to the prior art dot and column inversion driving methods, Vp-a becomes a negative value against common voltage (Vcom), and Vp-b becomes a positive value in a normal state such that a black state is displayed. However, as shown in FIG. 5b, if two adjacent electrodes are shortened, Vp-a and Vp-b become an average value of two voltages to become similar to the common voltage, resulting in the two pixels constantly displaying a white state, indicating defective pixels.